1. Technical Field
The present invention relates to a driver circuit and a test apparatus.
2. Related Art
A type of driver circuit called CML (Current Mode Logic) is known. The CML is provided with a pair of transistors switching between inverse phases according to a differential input signal, a pair of resistors that pull up collectors of the pair of transistors to a constant voltage source, and a constant current source that is connected commonly to emitters of the pair of transistors. Such a CML outputs an output signal from the collectors of the pair of transistors.
In the CML, the voltage amplitude of the output signal is equal to the product of (i) the resistance values of the resistors pulled up to the constant voltage source from the collectors of the transistors and (ii) the current value of the constant current source. Accordingly, in the CML, providing larger resistances for the pull up resistors increases the voltage amplitude of the output signal.
Furthermore, in the CML, the logic transition time of the output signal is proportional to the product of (i) the resistance values of the pull up resistors and (ii) the capacitance value of the parasitic capacitance connected to the collectors of the transistors. Accordingly, the CML can shorten the logic transition time of the output signal by decreasing the resistances of the pull up resistors.
In order to achieve both large-amplitude and high-speed operation in a single CML device, however, the pull up resistors must have small resistances and the constant current source must have a large current value. But when the current value of the constant current source is increased, the consumed power increases as well.